From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by passt.top (Postfix) with ESMTP id 0BDFE5A0082 for ; Fri, 24 Feb 2023 19:49:54 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1677264594; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PEyJzQ1nnMQrKpo0shHcrBsLqs+E4wZaaEE21fFmGwQ=; b=AyiZxtzk5MkPL4hG+XUcDRIStV6W2RvwvG0B4xEc2I92XuYpCUOCcTvmao0iDK5lyOhdic kbBfCDCPxLgFQc1phGfel0/EzRuqfP+JxEKK1OHh33iclUFgHcS7jaEQQEtors9OCHxxky k7wWt7kjFBKt1SwbL9WVHyvwTRh5vKM= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-450-sMfW-_qTPjWuZjDe3WYKtg-1; Fri, 24 Feb 2023 13:49:52 -0500 X-MC-Unique: sMfW-_qTPjWuZjDe3WYKtg-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 29EA8811E6E for ; Fri, 24 Feb 2023 18:49:52 +0000 (UTC) Received: from harajuku.usersys.redhat.com.homenet.telecomitalia.it (unknown [10.45.224.52]) by smtp.corp.redhat.com (Postfix) with ESMTPS id AF5FD140EBF6 for ; Fri, 24 Feb 2023 18:49:51 +0000 (UTC) From: Andrea Bolognani To: passt-dev@passt.top Subject: [PATCH 1/5] qrap: Fix limits for PCI addresses Date: Fri, 24 Feb 2023 19:49:45 +0100 Message-Id: <20230224184949.518615-2-abologna@redhat.com> In-Reply-To: <20230224184949.518615-1-abologna@redhat.com> References: <20230224184949.518615-1-abologna@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.7 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="US-ASCII"; x-default=true Message-ID-Hash: CLX6MZULY7I34XIVPQTLXUYPB6ILL6UX X-Message-ID-Hash: CLX6MZULY7I34XIVPQTLXUYPB6ILL6UX X-MailFrom: abologna@redhat.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.8 Precedence: list List-Id: Development discussion and patches for passt Archived-At: Archived-At: List-Archive: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: The pci.0 bus on a pc machine has 32 slots. For q35 machines, we don't expect devices to be plugged into pcie.0 directly, so technically we could have a very large number of slots by adding many pcie-root-ports, but even in this scenario 32 is a reasonable number. Signed-off-by: Andrea Bolognani --- qrap.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/qrap.c b/qrap.c index 287198e..2443fa3 100644 --- a/qrap.c +++ b/qrap.c @@ -89,13 +89,13 @@ static const struct pci_dev { "pc-q35", "virtio-net-pci", "bus=pci.", ",addr=0x0", "\"bus\":\"pci.", ",\"addr\":\"0x0\"", - 3, /* 2: hotplug bus */ 16 + 3, /* 2: hotplug bus */ 31 }, { "pc-", "virtio-net-pci", "bus=pci.0,addr=0x", "", "\"bus\":\"pci.0\",\"addr=0x", "", - 2, /* 1: ISA bridge */ 16 + 2, /* 1: ISA bridge */ 31 }, { "s390-ccw", "virtio-net-ccw", -- 2.39.2